A research team led by Im Jung Bin, a researcher at the Faculty of Electrical Engineering, proposed a scheme of a relay protection device based on Field Programmable Gate Array (FPGA) for high-speed operation of protection, one of the basic demands of relay protection.
Unlike in all conventional relay protection devices based on a microprocessor that realizes a protection algorithm by using the sequentiality of software architecture, they took advantage of the features of parallelism of FPGA in order to configure multi-function protective relays that promptly process multi-channel input signals in real time and concurrently estimate and process protective logics of different functions, in one FPGA.
They made a protection relay combined with functions of protection, control and communication by involving a data acquisition and control module, protection and warning modules, control modules for operation of protective relays of hardware architecture, a hardware checking module and a data transmission module, with a 64-point FCDFT module for multi-channel as the core.
The protective relay of a new scheme can operate within a 1.1 cycle of power frequency.
With plenty of hardware resources available on the FPGA board, this approach can be updated to a multi-function hardware relay with metering and protective capabilities and can be applied to different equipment of electric power systems in the future.
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