In order to realize automated and unmanned production processes, it is necessary to supervise and control the production process in real time, and check and evaluate the quality of products. Image processing units such as digital cameras are usually used to implement it. Recently, high-resolution cameras are used to improve the accuracy of data. The higher the resolution is, the bigger the amount of data is. Therefore, data transmission rate between computers and peripherals should be increased.
USB3.0 is a computer interface protocol that makes possible up to 5Gbps of data transmission by means of advanced techniques such as full-duplex transmission mode by multi channels, burst function using integrated packets and high-speed encoding technique by 8b/10b encoding, and its application technology has been widely studied for its good hardware connectivity and ease of use.
Ri Pyong Chol, a researcher at the Faculty of Information Science and Technology, has proposed a configuration and design of a USB high-speed transmission system that can achieve a USB3.0 data transmission rate of up to 3.2Gbps.
First, he combined a USB3.0 chip and Cyclone II FPGA to configure a high-speed data transmission system. Then, he programmed a firmware to set the data packet size and buffer size for maximum data transmission rate of the USB port. He also designed FPGA internal logic to increase the data transmission efficiency through the synchronous SlaveFIFO controller, the internal buffer, and the external I/O controller.
Finally, he measured the data transmission performance from the development system to the computer with a test program, and evaluated the efficiency of the proposed system design method.
He confirmed that the proposed method could ensure the data transmission rate of up to 3.2Gbps.
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