Jo Mar 24, 2022
Any application including ecological environment monitoring, target tracking, traffic control and agriculture surveillance needs a routing technique for forwarding data sensed by sensor nodes to the base station (BS) or the monitoring centre through several relay nodes.
In topology such as tree or mesh structures used in many applications, sensor nodes are often distributed randomly in areas beyond the reach of people. However, in a one-dimensional queue WSN, nodes are uniformly and densely deployed on a line and this type of network offers many applications such as ecological environment monitoring system along a river, fire monitoring and controlling system along a corridor, smart traffic monitoring system along a road, a tunnel or a bridge, and petroleum pipeline remote monitoring system. In such a one-dimensional queue WSN, the geographical location of each node is fixed, the distance between two neighboring nodes is always uniform, and sensed data can only be forwarded in one direction to the BS. Because of this, the network becomes more unreliable and has high probability that it may be partitioned if some continuous nodes have run out of their energy. Therefore, it should be a key factor of designing a routing protocol in one-dimensional WSNs to ensure energy efficiency and sensed data relay latency by balancing and optimizing energy consumption.
Existing routing protocols in WSNs including a one-dimensional queue WSN attempt to find the path of minimum energy consumption from the source node to the BS to achieve optimal energy consumption because transmitting data consumes much more energy than collecting data.
In one-dimensional queue WSNs, the network topology is linear, so the identification of each node is unique and continuous and the geographical position is certain. From such characteristics, the application of an algorithm that includes a sleep mode in the routing design through timeslot allocation could prolong the network lifetime by ensuring energy efficiency and also satisfy the requirement of sensed data relay latency considering the interference between nodes in some degrees.
This is a distributed energy-efficient opportunistic routing algorithm accompanied by timeslot allocation (DEEOR-TA) using specific network topology of a one-dimensional queue wireless sensor network.
DEEOR-TA algorithm is run in several rounds and each round involves two phases, i.e. clustering-based routing tree construction accompanied by timeslot allocation and data transmission.
Four measurable metrics are defined to evaluate the performance of DEEOR-TA in a one-dimensional queue WSN, i.e. average of residual energy, variation of residual energy, number of dead nodes, and network lifetime.
The simulation results show that the proposed protocol supports better energy efficiency than other existing protocols, and therefore, it can help to prolong the network lifetime.
This paper titled “A distributed energy-efficient opportunistic routing accompanied by timeslot allocation in wireless sensor networks” presented by Ri Man Gun, an institute head at the Faculty of Communication, is carried in the SCI Journal “International Journal of Distributed Sensor Networks”.
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Jo Mar 22, 2022
Choe Song Bom, a section head at the Faculty of Information Science and Technology, has developed an image processor to obtain input images from hand-based shoe design images, and on the basis of it, he has continued to invent a new method of serial expansion and realize it in a serial expansion program.
This program consists of 3 parts: noise reduction, contour highlight, and serial expansion.
Its application reduced design hours from 10 to 3 and improved design accuracy from 90% to 98%.
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Jo Mar 21, 2022
In keeping with the actual conditions where communication equipment is on the increase in its kind and scale, the research team led by An Chong Il, a researcher at the Faculty of Information Science and Technology, has developed a network management system using a simple network management protocol that enables the integrated management of individual pieces of communication equipment.
Thanks to it, it became possible to manage different pieces of existing communication equipment in an integrated way and also to satisfactorily supervise and manage newly-added ones.
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Jo Mar 18, 2022
The research group led by Sim Jae Rim, a section head at the Faculty of Materials Science and Technology has succeeded in the research into an effective method of debinding in metal injection molding (MIM) products.
They put MIM products made with paraffin-based binder in a benzol-acetone solution to remove soluble binder before heating them to remove insoluble binder, thus increasing debinding rate by more than 5% and reducing the duration of debinding by more than 2 hours.
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Jo Mar 17, 2022
The research team led by Kim Sung Nam, an institute head at the Faculty of Information Science and Technology, has developed a DNA computing simulation program to perform parallel computations on a personal computer by applying a DNA encoding process, a branch of biochemistry, to the optimum solution of intellectual problems.
The program consists of 3 parts: monkey-banana problems, TSP problems and word association problems.
This program is able to generate all possible paths and examine the possibility of optimization at the same time in parallel by simulating the DNA computing programmatically, in contrast to traditional optimal path-finding methods that generate all possible paths and then find one among them by examining conditions one by one.
The average time of solving problems is about 20s (Core i3) and the accuracy reaches 95%.
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Jo Feb 25, 2022
Ri In Sik, a researcher at the Semi-conductor Institute, made an analysis of reverse voltage distribution of high-voltage diode stack considering the effect of temperature.
First, he presented an equivalent circuit of a high–voltage silicon diode taking into account the effects of temperature and reverse voltage, and obtained an analytical expression for impedance of a diode. Then, he proposed the most generalized equivalent circuit of a high–voltage diode stack consisting of a serial connection of several diodes, and obtained an analytical expression for the reverse voltage applied to each diode. As a result, he offered an easy estimation of the reverse voltage distribution of a high–voltage diode stack by an analytical method, not in an experimental way.
High–voltage diode stacks (HVDS) are now widely used in extracorporeal shock wave lithotriptors, diagnostic X–ray equipment, sound detectors, night glasses, high–voltage magnetic compression modulators, high–voltage pulse generators, dust collectors and electrostatic fly–ash separators at thermal power plants.
The most important characteristic of an HVDS is reverse voltage distribution between chips or diodes. If the non–uniformity of reverse voltage distribution is severe, twice the breakdown voltage of P–N junction or more can be applied to the chips or diodes placed on high–voltage terminal and ground terminal, leading to their destructions. The reverse voltage distribution of an HVDS is mainly affected by the characteristics of chips or diodes, such as the dependence of the temperature and the reverse voltage on the impedance of them. The dependence of impedances of chips or diodes on temperature and reverse voltage strongly affect the reverse voltage distribution of an HVDS. Also, according to an HVDS consisting of stacked chips or a serial connection of individual diodes, the leakage impedances connected to the high–voltage terminal and the ground terminal are varied and they strongly affect the reverse voltage distribution. The stacking of chips and a serial connection of the individual diodes are the technologies that have been widely used to manufacture HVDS.
The reverse current of the diode increases and its barrier resistance decreases with increasing temperature and reverse voltage. In addition, when the reverse voltage of the diode increases, the width of the space–charge layer increases, thus the barrier resistance decreases. Consequently, the impedance of the diode decreases with increasing temperature and reverse voltage. Hence, the equivalent circuit of an HVDS consisting of a serial connection of the individual diodes is needed in order to analyze the reverse voltage distribution of it, considering the effects of the temperature and the reverse voltage of the diodes.
That is why, he proposed and analyzed a new equivalent circuit of an HVDS, including not only the impedance and the uniform voltage impedance of each device, but also the leakage impedance connected to the high–voltage terminal and the ground terminal.
The calculated values of the reverse voltage distribution of a high–voltage diode stack were shown to be in good agreement with the measured values.
His essay “Analysis of Reverse Voltage Distribution of High–Voltage Diode Stack Considering Effect of Temperature” is carried in SCI Journal “Solid-State Electronics”.
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